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Design and Test Technology for Dependable Systems-on-Chip
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Design and Test Technology for Dependable Systems-on-Chip Hardcover - 2011 - 1st Edition

by Raimund Ubar (Editor); Jaan Raik (Editor); Heinrich Theodor Vierhaus (Editor)


From the publisher

Designing reliable and dependable embedded systems has become increasingly important as the failure of these systems in an automotive, aerospace or nuclear application can have serious consequences. Design and Test Technology for Dependable Systems-on-Chip covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC). This book provides insight into refined "classical" design and test topics and solutions for IC test technology and fault-tolerant systems.

Details

  • Title Design and Test Technology for Dependable Systems-on-Chip
  • Author Raimund Ubar (Editor); Jaan Raik (Editor); Heinrich Theodor Vierhaus (Editor)
  • Binding Hardcover
  • Edition number 1st
  • Edition 1
  • Pages 580
  • Volumes 1
  • Language ENG
  • Publisher Information Science Reference
  • Date 2011-03-31
  • Features Bibliography, Index, Table of Contents
  • ISBN 9781609602123 / 1609602129
  • Weight 3.55 lbs (1.61 kg)
  • Dimensions 11.2 x 8.6 x 1.4 in (28.45 x 21.84 x 3.56 cm)
  • Themes
    • Aspects (Academic): Science/Technology Aspects
  • Library of Congress Catalog Number 2010045850
  • Dewey Decimal Code 621.381

Media reviews

Citations

  • Reference and Research Bk News, 06/01/2011, Page 307
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Design and Test Technology for Dependable Systems-on-Chip
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Design and Test Technology for Dependable Systems-on-Chip

by Raimund Ubar

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