Skip to content

DRAM Circuit Design: Fundamental and High-Speed Topics
Stock Photo: Cover May Be Different

DRAM Circuit Design: Fundamental and High-Speed Topics Hardcover - 2007 - 2nd Edition

by Brent Keeth

  • Used
  • Good

Description

Good. IMP: Used Good- Used items do not include CD-ROM, ACCESS CODE or companion materials, regardless of what is stated in item title. We ship from multiple locations. Prompt customer service.
Used - Good
NZ$316.38
NZ$5.01 Shipping to USA
Standard delivery: 7 to 14 days
More Shipping Options
Ships from A Book Cart (California, United States)

Details

  • Title DRAM Circuit Design: Fundamental and High-Speed Topics
  • Author Brent Keeth
  • Binding Hardcover
  • Edition number 2nd
  • Edition 2
  • Condition Used - Good
  • Pages 440
  • Volumes 1
  • Language ENG
  • Publisher Wiley-IEEE Press, Piscataway, N. J
  • Date 2007
  • Illustrated Yes
  • Features Bibliography, Glossary, Illustrated, Index, Table of Contents
  • Bookseller's Inventory # G0470184752
  • ISBN 9780470184752 / 0470184752
  • Weight 1.68 lbs (0.76 kg)
  • Dimensions 9.32 x 6.57 x 1.06 in (23.67 x 16.69 x 2.69 cm)
  • Library of Congress subjects Electronic circuit design, Random access memory
  • Dewey Decimal Code 621.397

About A Book Cart California, United States

Biblio member since 2024
Seller rating: This seller has earned a 5 of 5 Stars rating from Biblio customers.

We are leading book seller since last 7 years. We sell used as well as new condition books. We are committed to providing each customer with the highest standard of customer service.

Terms of Sale: 30 day return guarantee, with full refund including original shipping costs for up to 30 days after delivery if an item arrives misdescribed or damaged.

Browse books from A Book Cart

From the publisher

Includes bibliographical references and index

From the rear cover

A modern, comprehensive introduction to DRAM for students and practicing chip designers

Dynamic Random Access Memory (DRAM) technology has been one of the greatestdriving forces in the advancement of solid-state technology. With its ability to produce high product volumes and low pricing, it forces solid-state memory manufacturers to work aggressively to cut costs while maintaining, if not increasing, their market share. As a result, the state of the art continues to advance owing to the tremendous pressure to get more memory chips from each silicon wafer, primarily through process scaling and clever design.

From a team of engineers working in memory circuit design, DRAM Circuit Design gives students and practicing chip designers an easy-to-follow, yet thorough, introductory treatment of the subject. Focusing on the chip designer rather than the end user, this volume offers expanded, up-to-date coverage of DRAM circuit design by presenting both standard and high-speed implementations. Additionally, it explores a range of topics: the DRAM array, peripheral circuitry, global circuitry and considerations, voltage converters, synchronization in DRAMs, data path design, and power delivery. Additionally, this up-to-date and comprehensive book features topics in high-speed design and architecture and the ever-increasing speed requirements of memory circuits.

The only book that covers the breadth and scope of the subject under one cover, DRAM Circuit Design is an invaluable introduction for students in courses on memory circuit design or advanced digital courses in VLSI or CMOS circuit design. It also serves as an essential, one-stop resource for academics, researchers, and practicing engineers.

Media reviews

Citations

  • Scitech Book News, 06/01/2008, Page 172

About the author

Brent Keeth is a Fellow in DRAM Design R&D at Micron Technology, Inc. His twenty-five years of industry experience spans radar systems, avionics components, communicationsystems, professional production and post-production equipment for the broadcast television industry, and solid-state memory. He holds over 400 U.S. and foreign granted or pending patents.

R. Jacob Baker, PhD, is an engineer, educator, and inventor. He has more than twenty years of engineering experience and holds over 200 granted or pending patents in integrated circuit design. Dr. Baker is the author of several circuit design books. For a detailed biography, see http: //cmosedu.com/jbaker/jbaker.htm.

Brian Johnson is a Senior Design Engineer in DRAM Design R&D at Micron Technology, Inc. His research interests include asynchronous sequential circuits, clock synchronization circuits, and high-speed logic design. He holds over 60 granted or pending patents related to DRAM design and integrated circuit design.

Feng Lin, PhD, is a Senior Design Engineer in DRAM Design R&D at Micron Technology, Inc. His research interests include high-speed I/O circuits, PLL/DLL, and mixed-signal circuit design. Dr. Lin holds over 50 granted or pending patents related to DRAM and integrated circuit design.