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DRAM Circuit Design: A Tutorial (IEEE Press Series on Microelectronic Systems)
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DRAM Circuit Design: A Tutorial (IEEE Press Series on Microelectronic Systems) Hardcover - 2000 - 1st Edition

by Keeth, Brent

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Details

  • Title DRAM Circuit Design: A Tutorial (IEEE Press Series on Microelectronic Systems)
  • Author Keeth, Brent
  • Binding Hardcover
  • Edition number 1st
  • Edition 1
  • Condition Used - Good
  • Pages 256
  • Volumes 1
  • Language ENG
  • Publisher Wiley-IEEE Press, New York
  • Date November 10, 2000
  • Illustrated Yes
  • Bookseller's Inventory # 0780360141.G
  • ISBN 9780780360143 / 0780360141
  • Weight 1.1 lbs (0.50 kg)
  • Dimensions 9 x 6 x 0.63 in (22.86 x 15.24 x 1.60 cm)
  • Library of Congress subjects Random access memory, Semiconductor storage devices - Design and
  • Library of Congress Catalog Number 000598-2
  • Dewey Decimal Code 621.397

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First line

A Write operation is similar to a Sensing and Restore operation except that a separate Write driver circuit determines the data that is placed into the cell.

About the author

About the Authors...
Brent Keeth began his electrical engineering career designing radar subsystems for military applications and hybrid integrated circuits for avionics control systems. He went on to design baseband scrambling and descrambling equipment for the CATV industry and professional production and post-production video equipment for the broadcast television industry. Mr. Keeth, a principal fellow at Micron Technology, Inc., has engaged in the R&D of generations of CMOS DRAMs and currently performs extensive research in high-speed bus protocols and open standard memory design. He has served on technical program committees for both the IEEE International Solid-State Circuits Conference and the Symposium on VLSI Circuits. In addition, Mr. Keeth has reviewed numerous papers for the Journal of Solid-State Circuits. He holds over 60 U.S. and foreign patents.
R. Jacob Baker is an associate professor of electrical engineering at Boise State University and a senior design engineer at Micron Technology, Inc. At Boise State, Dr. Baker teaches courses and conducts research in CMOS analog and digital integrated circuit design, while at Micron Technology he designs circuits for emerging memory technologies and DRAM interfaces. He is a coauthor of the popular textbook CMOS: Circuit Design, Layout, and Simulation (IEEE Press, 1998). Dr. Baker holds 12 patents.